Enter your email above, then click "Sign Up" to join the STAC mail list and (optionally) register to access materials on the site. Click for terms.
New records from the first tests of a pure FPGA-based or CXL-based UDP stack.
Under STAC-T0, max actionable latency of 44 nanoseconds across all message sizes and rates
2.67x the space efficiency and 1.25x the energy efficiency of a system using the single-chip Cascade Lake
NFS-based solution beats previously tested Lustre-based solution in most benchmarks
Solution sets 8 records in scale tests
6,250 times as many simulations on a basket of 50 instruments in 1 hour as the previous record
Cascade Lake solution computed Greeks 23-84% faster than Skylake solution
First STAC-M3 results on Microsoft Azure
Read the latest about research, events, and other important news from STAC.
