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First STAC-ML project using FPGAs as accelerators
Charts of 2 million data points in 3.67 seconds
Max latency of 0.789 microseconds from start of market data message to start of order frame
Solution sets 4 records in baseline tests.
Under STAC-T0, max actionable latency of 44 nanoseconds across all message sizes and rates
2.67x the space efficiency and 1.25x the energy efficiency of a system using the single-chip Cascade Lake
NFS-based solution beats previously tested Lustre-based solution in most benchmarks
Solution sets 8 records in scale tests
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