Speaker Biographies – Feature Sessions - Chicago

Andy Bechtolsheim, Inventor, Entrepreneur, Investor.

Stephen Donnelly, CTO, Endace.
Stephen has worked on packet capture and time stamping systems for 20 years, receiving his PhD on “High Precision Timing in Passive Measurements of Data Networks” from the University of Waikato, New Zealand. He was a founding employee at Endace, developing FPGA based packet capture and timing systems. He has developed clock synchronization systems and high performance network monitoring virtualization for Endace appliances, and collaborated with customers in Telcos, Finance, Test & Measurement, Enterprise, and Government to solve unique problems. Stephen is a contributor to the Wireshark, libpcap, Argus and Suricata open source projects.

Peter Lankford, Founder & Director, Securities Technology Analysis Center.
Peter leads STAC®, which provides hands-on technology research and testing tools to the finance industry and facilitates the STAC Benchmark Council™, a group of leading financial institutions and vendors that engages in technical dialog and specifies standard ways to assess technologies used in finance. Prior to STAC, Peter was SVP of the $240M market data technology business at Reuters. Prior to Reuters, Peter held management positions at Citibank, First Chicago Corp., and operating-system maker IGC. Peter has an MBA, Masters in International Relations, and Bachelors in Chemistry from the University of Chicago.

Nevin Liber, Member of ISO C++ Committee's SG14 study group and Language Evolution Working Group.
Nevin is a veteran C++ developer, having first discovered the language in 1988 while at Bell Labs. He has programmed everything from operating systems (at Apple) to application software for the Palm platform (Pendragon Software), slot machines (WMS Gaming), and low latency trading systems (DRW). Today he is a Senior Software Developer at Neurensic. Nevin has spoken at C++ Connections, BoostCon, CppCon, and local user groups, and in 2013 he hosted both the C++ and C committee meetings with the support of DRW. At the Chicago C/C++ Users Group, Nevin started "Grilling the C++ Committee", which has since been adopted by C++Now and CppCon.

David O’Shea, Financial Services ISV Segment Manager, Intel
David has been with Intel for more than 20 years, the last 15 of which he has served as Intel’s ISV lead within financial services. During that time, Intel platforms matured from file and print applications to the mission critical work horse of the industry. David has pioneered Intel’s efforts to meet industry requirements for risk management, market data, and high frequency trading. Prior to Intel, David worked with leading software providers on RISC and PC platforms. David is married, has three children, and is an avid golfer with a high handicap.

Thomas Rodgers, Member of ISO C++ Committee's SG1 and SG14 study groups.
Thomas has over 20 years' experience in software development. In addition to his activity in the ISO committees, Thomas is a System Architect at Neurensic. Prior to this, he served in numerous development and development management roles at firms like DRW, Matlock Capital, UBS, and Bear Stearns.

Raymond Russell, CTO, Corvil
Raymond is one of Corvil’s founders and co-inventor of its core technology. Since joining Corvil in 2000 as Chief Technology Officer, Raymond has played an instrumental role in building a strong product suite around the core Corvil technology. As CTO, Raymond is focused on driving continued advancement and fulfillment of Corvil’s innovations with a focus on applications and infrastructure in capital markets.

David Snowdon, Co-Founder & CTO, Metamako.
David is a Founder and co-CTO at Metamako, with his core role comprising product and technology strategy at the company. His role liasing with customers about their needs gives him a unique view into the challenges faced by such firms. Prior to founding Metamako, David gained a wealth of experience working in and for HFT firms, optimising their network structures, network performance, and building performance hardware, gateware and software. He has a PhD in Operating Systems, looking at and taking advantage of the effect of frequency scaling on power and energy usage. Energy efficiency has long been an interest, with ten years spent designing, building and racing high performance solar powered cars in international events. David’s team formerly held the Guiness record for the world’s fastest solar powered vehicle.

Stéphane Tyč, CEO, McKay Brothers.
Stéphane received a PhD in Physics from Harvard University. He continued his fundamental research at Thales Group. He earned multiple patents on power transistors for microwave radios and superconducting logic devices. Stephane enjoyed a 17-year career at BNP Paribas. He directed Equity Derivative Quantitative R&D, Global Business Management, and Post Trade Services. His responsibilities included low latency arbitrage research, high performance computing, and market risk. He also served on the DTCC Warehouse Trust Company Board of Directors for two years.

Michael Wong, Chair of ISO C++ committee SG14 and SG5.
Michael is the Canadian Head of Delegation to the C++ Standard and a past CEO of OpenMP. He is also a Director and VP of ISOCPP.org, and Vice-Chair of Programming Languages for Canada’s Standard Council. He chairs WG21 SG14 Games Development/Low Latency/Financial/Embedded Devices and WG21 SG5 Transactional Memory, and is the co-author of a book on C++ and a number C++/OpenMP/Transactional Memory features including generalized attributes, user-defined literals, inheriting constructors, weakly ordered memory models, and explicit conversion operators. He is currently Vice President of Research and Development, Codeplay Software. As the past C++ team lead to IBM’s XL C++ compiler, he has been messing around with designing C++ compilers for twenty-five years. His current research interest is in the area of parallel programming, future programming models for self-driving cars and low-power devices, lock-free programming, transactional memory, C++ benchmark performance, object model, generic programming and template metaprogramming. He holds a B.Sc from University of Toronto, and a Masters in Mathematics from University of Waterloo. He is the current Editor for the Concurrency TS and the Transactional Memory TS.