The Edge of the Edge: PCB Latency in Trading Reaction Time

Adam Sherer, Verification Technology Executive, Cadence Design Systems, presented this at the 18 May 2023 STAC Summit in Chicago.

Download the slides below.

STAC-Summit-18-May-2023-Cadence.pdf1.53 MB

NOTE: Some or all of the content on this page and its attachment(s) were supplied by a party other than STAC. STAC does not endorse the content. No performance claims are supported by STAC except those found in an official STAC Report of results audited by STAC.