Enter your email above, then click "Sign Up" to join the STAC mail list and (optionally) register to access materials on the site. Click for terms.
For comparison to previous bare metal results on the same hardware
First FPGA implementation of STAC-A2 benchmarks
Multiple records in performance and storage efficiency
Worst pairwise error between 94 ports on 2 devices was 799 picoseconds
Solution sets total of 17 records in scale and baseline benchmarks
