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Olivier Baetz, COO, NovaSparks.
Olivier joined NovaSparks in April 2011, bringing over ten years of experience selling and implementing low latency technology solutions for the financial industry. In 2000, Olivier was part of the original team at Radianz, the first global Extranet for the financial industry. At Radianz, Olivier successfully designed the solution for the original “proof of concept” customer which established the value of the Radianz community model. He also ran the North American Sales Engineering team for five years and was instrumental in the creation of the Radianz ULTRA service which provides ultra-low latency exchange con-nectivity to high-frequency trading firms. In 2009 and 2010, Olivier built and led the global technical convergence project team to integrate the Radianz platform into the global BT Network. Olivier started his career in telecoms, designing and selling managed network solutions for large multinational firms. Olivier holds a MS in Telecom Engineering from ENST Paris and an MBA from Wharton with a major in Finance. When he is not working, Olivier enjoys sailing, surfing, skiing and all good wines from around the world.
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Arnaud Derasse, CEO, Enyx.
Arnaud spent several years in the development of IT solutions for the medical industry and interventions through research projects for French CNRS. Arnaud then decided to focus on the world of digital electronics. Following his degree at ESIEE Paris, he began a one year program at HEC Startup Institute targeted on entrepreneurship with innovative technologies. Upon the completion of this program, he joined an emerging start-up, was responsible for the recruitment of the majority of the technical team and worked with company grow and development. Arnaud is now a co-founder and CEO of Enyx.
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Matthew Dixon, Ph.D., FRM, Assistant Professor of Finance, Stuart School of Business, IIT.
Matthew is an Assistant Professor and specializes in financial modeling, machine learning and high performance computing. Matthew began his career as a quantitative developer at Lehman Brothers in London before pursuing academics and consulting for financial institutions in quantitative risk modeling. Matthew is a chartered financial risk manager and principal consultant for Quiota LLC, a consulting firm for buy side risk management and trading analytics. He holds a Ph.D. in Applied Mathematics from Imperial College (2007), a Master of Science in Parallel and Scientific Computation with distinction from the University of Reading (2002) and has held postdoctoral and visiting professor appointments at Stanford University and UC Davis respectively. He has published several academic papers at the intersection of financial modeling and high performance computing, chairs the workshop on high performance computational finance at SC and is co-founder of the Thalesians.
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Milan Dvorak, Tradecope Department Director, Netcope Technologies
Milan is a Tradecope Department Director at Netcope Technologies, formerly FPGA department of INVEA-TECH company. He gained his experience working as a solutions architect of Tradecope, low-latency trading solution based on FPGA technology. Milan had been selected to tackle the challenge of building Tradecope even before graduating thanks to his great study results and work on research projects at Brno University of Technology, where he later received a Master's degree in Computer Science and Computer Networks.
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Andre Kerstens, Senior Technologist, DDN Storage.
Andre has been very active in HPC, distributed computing and big data for the past 16 years. He has gained valuable experience in Financial Services, specifically in the fields of investment banking and trading technologies during his early consulting days overseas, while since his move to the USA he has been with SGI, Penguin Computing and currently is in a Senior Technologist role at DDN Storage. Andre likes to work on architecting cutting edge compute and storage solutions with his customers, he also likes to talk about all things technology. Andre received his M.S. in Computer Engineering from the Delft University of Technology in the Netherlands.
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Matthew Knight, Technical Marketing Director, Financial Services, Solarflare.
Before joining Solarflare in January 2014, Matthew was the Company President of Accensus, a company building an ultra-low-latency hybrid software/FPGA trading platform. Prior to that he worked at DRW Trading in Chicago in the role of Head of Labs focused on ultra-low-latency technology and before that he worked at STAC in its early days, following almost a decade at Reuters.
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Peter Lankford, Founder & Director, Securities Technology Analysis Center.
Peter leads STAC®, which provides hands-on technology research and testing tools to the finance industry and facilitates the STAC Benchmark Council™, a group of leading financial institutions and vendors that engages in technical dialog and specifies standard ways to assess technologies used in finance. Prior to STAC, Peter was SVP of the $240M market data technology business at Reuters. Prior to Reuters, Peter held management positions at Citibank, First Chicago Corp., and operating-system maker IGC. Peter has an MBA, Masters in International Relations, and Bachelors in Chemistry from the University of Chicago.
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John Lockwood, CEO, Algo-Logic.
John is the founder and CEO at Algo-Logic Systems. Algo-Logic's hardware-accelerated logic circuits enable networks to achieve ultra-low latency processing while carrying large volumes of data. From 2006 to 2009, John managed the NetFPGA program as a Consulting Associate Professor at Stanford University. At Stanford, John grew the worldwide deployment of NetFPGA hardware from 10 to 1,021 units. Prior to joining Stanford in January of 2007, John led the Reconfigurable Network Group, which was a part of the Applied Research Laboratory at Washington University in Saint Louis. There he was a tenured Associate Professor in the Department of Computer Science and Engineering. John and his research group developed the Field programmable Port Extender (FPX) to enable rapid prototype of extensible network modules in Field Programmable Gate Array (FPGA) technology. Over the past 20 years, John has published over 100 papers and has 7 patents related to FPGA systems and networking systems. John earned his MS, BS, and PhD degrees from the Department of Electrical and Computer Engineering at the University of Illinois.
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Sergey Maidanov, Software Engineering Manager, Intel.
Sergey Maidanov leads the team of software engineers working on the optimized Intel® Distribution for Python*. He’s 15+ years of experience in numerical analysis with a range of contributions to Intel software products such as Intel MKL, Intel IPP, Intel compilers, and others. Among his recently completed projects was the Intel® Data Analytics Acceleration Library. Sergey received a master’s degree in Mathematics from the State University of Nizhny Novgorod with specializations in number theory, random number generation, and its application in financial math. He was a staff member of the International Center of Studies in Financial Institutions at the State University of Nizhny Novgorod.
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Pat McGarry, Vice President of Engineering, Ryft.
Pat brings extensive technology and leadership experience in hardware and software engineering to his role as Vice President of Engineering at Ryft. He joins Ryft from Ixia Communications, where he was responsible for the company’s Federal security systems engineering programs. During his tenure at Ixia and BreakingPoint Systems, Pat spent several years working in the cyber security industry within the DoD and the Intelligence communities conducting experimentation and analysis of cyber-related performance and security concerns on arbitrary network infrastructures. Prior to BreakingPoint, Pat held key roles in product and engineering management. This included hardware and software design in the realm of embedded systems design, network systems analysis and design, and cyber security, while working at both Spirent and Hekimian Laboratories. He earned Bachelor’s degrees in Computer Science from Virginia Tech and Electrical Engineering from Virginia Tech.
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Christopher Nicholson, Founder & CEO, Skymind.
Chris Nicholson co-founded Skymind and Deeplearning4j, the most popular deep-learning framework on the JVM. He previously led communications and recruiting for the Sequoia-backed YCombinator startup FutureAdvisor, which was acquired by BlackRock this year. Chris spent a decade reporting on tech and finance for The New York Times, Businessweek and Bloomberg News, among others. He attended Deep Springs College and holds a degree in economics.
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Arch D. Robison, Julia contributor and enthusiast.
Arch D. Robison contributed the SIMD loop support in Julia and presented a workshop on high performance Julia at JuliaCon 2015. Arch used Julia exclusively to take 2nd place in a cycle-intensive Al Zimmerman programming contest. His is a Senior Principal Engineer at Intel. Arch was the original architect of Intel Threading Building Blocks, one of the authors of the book Structured Parallel Programming, and holds 16 patents.
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Michael Voss, Software Architect, Intel.
Michael is a Software Architect in the Software and Services Group at Intel. He has been a member of the Intel® Threading Building Blocks team since 2006 and is the architect of the flow graph API. Prior to joining Intel in 2006, he was an assistant professor in the Edward S. Rogers Sr. Department of Electrical and Computer Engineering at the University of Toronto. He received his Ph.D. in Electrical Engineering from Purdue University in 2001. His interests include shared memory parallel programming, compilers and runtime optimization.
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