STAC Summit, 1 Nov 2017, NYC

STAC Summits

STAC Summits bring together industry leaders in architecture, app dev, infrastructure
engineering, and operational intelligence to discuss important technical challenges in
the finance industry. Come to hear leading ideas and exchange views with your peers.

WHEN
Wednesday, 1 November 2017
STAC Exchange (exhibits) opens at 8:30am
Meeting starts at 9:00am
Networking Lunch at ~12:00pm
Conference concludes ~5:00pm
Reception immediately following.

WHERE
New York Marriott Marquis, 1535 Broadway, New York
Astor Ballroom


 

Partial Agenda

 

Big Compute Big Compute

Fast Compute Fast Compute

Big Data Big Data

Fast Data Fast Data

 



STAC Update for big compute analyticsBig Compute   
 

Peter will present the latest benchmark results for big-compute workloads based on derivatives risk.

STAC Update for big data analyticsBig Data   
 

Peter will discuss the latest benchmark results involving big data workloads such as tick analytics and backtesting.

Panel: The changing face of analytics infrastructureBig Compute   
 

Details to be announced shortly

Innovation Roundup - Round 1 Big Data
  "QuasarDB Time Series: transparent historical market data management"
    Edouard Alligand, CEO, quasardb
  "Levyx: Backtesting in the Cloud"
    Matt Meinel, Financial Services Business Development, Levyx

 

Hitching QuantLib to KNL: An experience with Intel Xeon PhiBig Compute   
 

As the capabilities of processors and co-processors continue to increase, the opportunity for applications to take advantage of those capabilities gets larger--but so does the programming challenge. As part of research at the Illinois Institute of Technology into parallel software design patterns, Tom has been working with the latest Intel Xeon Phi processor (Knights Landing) to understand how best to exploit its features. Using QuantLib as a use case, he is adapting the code to leverage AVX-512 instruction sets, Phi-specific intrinsics and mixed thread/vector concurrency code generation in the Intel Compiler Collection, as well as High-Bandwidth Memory, streaming writes, and Sub-NUMA Clustering. In this talk, Tom will provide a snapshot of his experience so far.

Innovation Roundup - Round 2 Big Data
  Title to be announced
    Young Paik, Director, Product Planning, Samsung Semiconductor, Inc.
  Title to be announced
    Hollis Beall, Director of Performance Engineering, X-IO Technologies
  "Performance tips for applications on Optane"
    Mark Laurenz, Marketing Manager, Intel
  Title to be announced
    Dave Weber, Director & CTO, Lenovo

 

Why you're probably leaving C++ performance on the tableFast DataBig Data   Fast Compute   Big Compute   
 

Getting the lowest latency or highest throughput from C++ code remains a top priority for many trading firms. That explains the enthusiastic response to our talk by Bjarne Stroustrup last year and our panels on C++ in HFT at the Chicago and London STAC Summits. One of those panelists was Tom Rodgers, who has over 20 years of experience writing high-performance C++ code for trading firms and is on the ISO C++ Committee, including SG 1 (concurrency) and SG14 (low latency). After providing a quick review of the structure of modern machines, Tom will discuss fundamentals such as the cache, alignment of data, and data placement. He will cover the importance of structuring code to give the compiler the most information possible for optimization, and he’ll show the differences in machine code that result from optimal versus non-optimal code. Finally, he’ll touch on key performance issues in multi-threaded design, challenging some common assumptions along the way (e.g., is lock free always better?).

STAC Update: Time SyncFast Data
 

Peter will provide his perspective on the preparedness of firms for MiFID2 time compliance, as well as how regualtory enforcement is looking at this point. He will also provide updates on STAC-TS research on time synchronization, timestamping, and event capture, as well as software tools to demonstrate compliance with time-sync regulations.

Innovation Roundup - Round 3 Fast Data
  "Monitoring of Time Sensitive Networks"
    John Fischer, CTO, Spectracom
  "Monitoring at High Speed: Accurate Data=Better Decisions"
    Joshua Joiner, Director, Solution Engineering & Support, cPacket
The Race, Season 5: What's in the AirFast Data
 

We’re now a good five years into the low-latency wireless era, which followed just two years after the advent of the ultra-direct fiber era. Is there another “era” to come? Does some other transport promise to move latencies asymptotically closer to the speed of light in a vacuum, while raising the table stakes even higher for low-latency trading? Or could a new approach potentially reduce the cost of ultra-low latency enough to broaden competition in the elite speed game? What about satellites? Drones? Balloons? In this talk, Stephane will review some of these approaches and analyze their potential to influence the trading business.

STAC Update: Fast DataFast Data   
 

Peter will discuss the latest research and Council activities related to low-latency/high-throughput realtime workloads.

Innovation Roundup - Round 4 Fast Data
  “Low Latency Networking Update”
    Asaf Wachtel, Sr. Director, Business Development, Mellanox
  "Solarflare: Faster and in-sync"
    Davor Frank, Senior Solutions Architect, Solarflare
  "Metamako Platforms: Speed - Intelligence - Accuracy"
    Matthew Knight, VP of Technical Marketing, Metamako
  "Power, performance and predictability improvements from Exablaze."
    Dr Matthew P. Grosvenor, Vice President Technology, Exablaze
  Title to be announced
    Arnaud Lesourd, Senior Application Engineer, NovaSparks
  Other presenters to be announced shortly.
   
~5:00pm Networking Reception

 

 

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About STAC Events & Meetings

STAC meetings bring together industry leaders to focus on challenging areas of financial technology. They range from large in-person gatherings (STAC Summits) to webinars and working group teleconferences. 

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